Here's a little history of intel processors and the clobe was successfully extracted
Intel processor series starting with MCS4 which is the forerunner of the i4040 processor. 4-bit processor is planned to be a brain calculator, the same year (1971), Intel makes revisions to the i440. Initially ordered by a Japanese company for the manufacture of calculators, it is far more powerful processors than expected so that Intel bought the rights to the Japanese company for development and further research. This is where the precursor to the development towards a computer processor.
Next came the first 8-bit processor i8008 (1972), but somewhat less preferred because multivoltage .. then emerging i8080 processor, here there is a change that is so triple voltage, use of technology NMOS (PMOS no longer), and introduces the first system clock generator (pake additional chips), packaged in 40 pins DIP Array. Then came also processor2: Motorola's MC6800 -1974, -1976 Zilog Z80 from (the two rivals), and other prosessor2 6500 series made by MOST, Rockwell, Hyundai, WDC, NCR and so on. Z80 full compatible with the i8008 only until the machine language level. Different levels of language assemblies (not compatible software level). I8080 processor is a processor with 8-bit internal registers, external bus 8-bit and 20-bit memory addressing (you can access 1 MB of total memory), and the operation mode REAL.
77 yr appears 8085, clock generator onprocessor, the precursor to the use of single voltage +5 V (the implementation of s / d 486DX2, DX4 pd started +3.3 V etc.).
i8086, the processor with 16-bit registers, the external data bus, 16-bit and 20-bit memory addressing. Released 78 years using HMOS technology, supporting component 16-bit bus is very rare, so the price becomes very expensive.
So to answer the demands of emerging markets i8088 16bit internal bus, external bus 8bit. So that the i8088 can use 8bit peripheral components used i8008. IBM chose this chip to manufacture IBM PC because it is cheaper than the i8086. If only the CEO of IBM at that time did not express the PC side is just a mere dream, of course, IBM will dominate the PC market in total today. IBM's first PC release in August 1981 has 3 versions of the IBM PC, IBM PC-Jr and IBM PC-XT (extended technology). I8088 chip is very popular, until the NEC unveiled a chip that is built based on the specifications of this chip pins, named V20 and V30. NEC V20 and V30 is compatible with Intel processors up to the level of assembly language (software).
8088 and 8086 chip fully compatible with programs created for the chip 8080, although there may be some programs made for the 8086 chip does not work in 8088 (differences in bus width)
8088 and 8086 chip fully compatible with programs created for the chip 8080, although there may be some programs made for the 8086 chip does not work in 8088 (differences in bus width)
Then came the 80 186 and i80188 .. since i80186, processors began to be packaged in a PLCC, LCC, and PGA 68 feet .. i80186 physically 17 feet square with precision (PLCC / LCC) or 2 rows of foot-precision (PGA) and the start of this i80186 chip DMA and interrupt controller integrated into the processor. since using the 286, IBM uses the term IBM PC-AT (Advanced Technology) and has become a popular use of the term PersonalSystem (PS / 1). And is also becoming known use of 16 bit ISA slots are developed from 8-bit ISA slot, the cloner began popping crowded. There are AMD, Harris & MOS fully compatible with Intel. In the 286 is becoming known use of Protected Virtual Address Mode that allows for multitasking time sharing (via hardware resetting).
IBM 86 years to make a processor with 32bit RISC architecture first-class PC. But because of the scarcity of software, IBM RT PC is "sluggish" for enterprise-class, RISC is growing more rapidly, at least there are many vendors are mutually incompatible.
* Then to reach the lost momentum of the i8086 chip, Intel i80286, processors with 16-bit registers, an external bus, 16-bit protected mode with limited known STANDARD mode using 24-bit memory addressing that can access a maximum of 16 MB of memory . 80 286 chips is of course fully compatible with 808x series chips before, with the addition of several new instruction set. Unfortunately, this chip has a few bugs in the design of its hardware, so it failed to gather followers.
In 1985, Intel launched the design of a completely new processor: i80386. A 32-bit processor, in the sense of having 32-bit registers, the external data bus 32-bit, and maintain compatibility with previous generation processors, with the introduction of an additional 32-BIT PROTECTED mode for 32-bit memory addressing, is able to access a maximum of 4 GB, and do not forget the extra few new instructions. The chip is packaged in a PGA start (Pin Grid Array)
Intel processors up to this point has not used the FPU unit
internally. To support the FPU, Intel launched a series of 80 × 87. Since the 386 is beginning to emerge cloner processor: AMD, Cyrix, NGen, IT, IIT, IBM (Blue Lightning) etc., kinds-kinds:
i80386 DX (full 32 bit)
i80386 SX (cheap because 16bit external)
i80486 DX (int 487)
i80486 SX (487 disabled)
Cx486 DLC (using MB 386DX, others)
Cx486 SLC (using MB 386SX)
i80486DX2
i80486DX2 ODP
Cx486DLC2 (architecture MB 386)
Cx486SLC2 (architecture MB 386)
i80486DX4
i80486DX4 ODP
i80486SX2
Pentium
Pentium ODP
* Around 1989, Intel launched i80486DX. Which is very popular series, this series increased to 80 386 series is a velocity and internal FPU support schemes and clock multiplier (i486DX2 and iDX4 series), without additional new instructions. Due to public demand for cheaper processors, Intel launched a series i80486SX is none other than the circuit i80486DX processor FPU has been disabled. As it should, i80486DX series has full compatibility with the instruction set chips previous series.
* AMD and Cyrix processors i80386 then buy the design and i80486DX to make Intel-compatible processors, and they proved very successful. My opinion this is a process called 'cloning', the same as the NEC V20 and V30 stories. AMD and Cyrix did not perform a vertical design process (based on a previous series chips), but based on an existing chip design to create a chip that class.
* In 1993, Intel launched the Pentium processor. Improvements to the i80486: PGA greater structure (higher speed, and pipelining, WITHOUT new instructions. There is nothing special about these chips, just the fact that standards are created for i80486 VLB does not fit (it is not compatible) so that the chipset maker forced to redesign to support PCI. Intel Pentium uses the term to "drag" his rival. Since the Pentium is the cloner start "falling out" stay AMD, Cyrix. Intel uses the term because Intel Pentium patents lost in court. the reason the numbers can not be a patent , because it uses Intel released the Pentium TM. Cyrix + AMD does not want to fall behind, they issued a standard Pentium Rating (PR) 92 Intel had previously Ditahun collaboration with Sun, but failed, and Intel was sued by Sun for allegedly copying the design of Sun. Since the Pentium, Intel has implemented Pipelining capabilities that typically exist diprocessor cuman RISC (RISC like SunSparc). Vesa Local Bus that 32bit is the development of ISA 16bit architecture uses a fixed clock because it has its own clock generator (typically> 33MHz) while the PCI architecture is a new architecture that speeds clocknya follow Processor clock speed (typically half the speed of processor speed) .. so the relative speed PCI VGA card will not be the same in a different processor MHz frequency aliases faster MHz processor, the faster PCI his
* In 1995, the emergence of the Pentium Pro. Innovation united cache memory into the processor demands made socket 8. Pin-pin processor is divided into two groups: one group to the cache memory, and a group again for the processor itself, which is nothing more than pin-pin Pentium modified arrangement. Processor design allows a higher efficiency when dealing with 32-bit instructions, but if there is a 16-bit instructions appearing in 32-bit instruction cycle, then the processor will make emptying the cache so that the execution process is slow. There's only one instruction is added: CMOV (Conditional MOVE).
* In 1996, the Pentium MMX. Actually nothing more than a Pentium with additional units and additional instruction sets, ie MMX. Intel still has not provided a clear definition of the term MMX. Multi Media Extension is a term used AMD. There is a limitation on the design of this chip: for MMX modules are added only just into the design of the Pentium without redesign, Intel was forced to make the MMX and FPU units do the sharing, in a sense when FPU MMX active non-active, and vice versa. So the Pentium MMX mode is not compatible with the Pentium MMX.
What about the AMD K5? AMD K5-PR75 is actually a 'clone' i80486DX with internal speed 133MHz and 33MHz bus clock. Specifications Pentium AMD gained when designing the next versions K5 and Cyrix when designing the 6 × 86 was limited to a pin-pin Pentium specification. They were not given access to the original design. Even IBM can not make Intel unmoved (Cyrix, IBM has a contract until the year tied with 2005)
Regarding the design of the AMD K6, K6 did you know that the design is actually owned by NexGen? As Intel states make the unit MMX, AMD is looking for design and add it to the K6 MMX. Unfortunately specifications are obtained MMX AMD used Intel's likely not, since proven to have many ketidakkompatibilitas K6 MMX instruction with the Pentium MMX.
* In 1997, Intel launched the Pentium II, Pentium Pro with MMX technology which has two innovations: the cache memory does not become one with the core as the Pentium Pro processor, but outside the nucleus but functions with processor speed. Innovation is what causes the loss of deficiency Pentium Pro (problems emptying the cache) The second innovation, the SEC (Single Edge Cartidge), Why? Since we can install the Pentium Pro processor in the slot with the help of special adapters SEC. Addendum: since onprocessor L2 cache, the cache speed = speed of the processor, whereas for the PII its cache in the "outside" (using the processor module), then the speed is half the processor speed. Mentioned also use the PII Slot 1 for several reasons:
First, to widen the data path (foot lot - also became the reason for Socket 8), processing in PPro and PII can be parallel. Slot 1 because it actually had more power in Multithreading / Multiple Processor. (Unfortunately the O / S has not been much support, dual PII benchmark processorpun by ZDBench more done via Win95 rather than via NT)
Second, it allows upgrader Slot 1 without consuming a lot of space on the motherboard because if not ZIF socket 9, could be an area of Form Factor (MB) of its own this space-saving concept since 8088 has also been there. Why out as well SIMM specifications in 286? some of which is efficiency and simplification of the forms.
Third, it allows the use of the cache module that is more efficient and with high speed balanced with speed processors and again without a lot of eating places, unlike AMD / Cyrix are "forced" to double its cache L1 to rival the speed PII (because of its slow L2) so that conclusions AMD K6 and Cyrix 6 × 86 rather quickly in the processor rather quickly in a cache hit! Because the spec Socket7 L2 cache speed will be limited only as fast as the data bus / slower when the data bus is busy, but PII next year is planned to operate at 100MHz (66MHz instead of longer). Point is one of the reasons why the intel chipset change of 430 to 440 which means also need to replace the motherboard.
Intel processors up to this point has not used the FPU unit
internally. To support the FPU, Intel launched a series of 80 × 87. Since the 386 is beginning to emerge cloner processor: AMD, Cyrix, NGen, IT, IIT, IBM (Blue Lightning) etc., kinds-kinds:
i80386 DX (full 32 bit)
i80386 SX (cheap because 16bit external)
i80486 DX (int 487)
i80486 SX (487 disabled)
Cx486 DLC (using MB 386DX, others)
Cx486 SLC (using MB 386SX)
i80486DX2
i80486DX2 ODP
Cx486DLC2 (architecture MB 386)
Cx486SLC2 (architecture MB 386)
i80486DX4
i80486DX4 ODP
i80486SX2
Pentium
Pentium ODP
* Around 1989, Intel launched i80486DX. Which is very popular series, this series increased to 80 386 series is a velocity and internal FPU support schemes and clock multiplier (i486DX2 and iDX4 series), without additional new instructions. Due to public demand for cheaper processors, Intel launched a series i80486SX is none other than the circuit i80486DX processor FPU has been disabled. As it should, i80486DX series has full compatibility with the instruction set chips previous series.
* AMD and Cyrix processors i80386 then buy the design and i80486DX to make Intel-compatible processors, and they proved very successful. My opinion this is a process called 'cloning', the same as the NEC V20 and V30 stories. AMD and Cyrix did not perform a vertical design process (based on a previous series chips), but based on an existing chip design to create a chip that class.
* In 1993, Intel launched the Pentium processor. Improvements to the i80486: PGA greater structure (higher speed, and pipelining, WITHOUT new instructions. There is nothing special about these chips, just the fact that standards are created for i80486 VLB does not fit (it is not compatible) so that the chipset maker forced to redesign to support PCI. Intel Pentium uses the term to "drag" his rival. Since the Pentium is the cloner start "falling out" stay AMD, Cyrix. Intel uses the term because Intel Pentium patents lost in court. the reason the numbers can not be a patent , because it uses Intel released the Pentium TM. Cyrix + AMD does not want to fall behind, they issued a standard Pentium Rating (PR) 92 Intel had previously Ditahun collaboration with Sun, but failed, and Intel was sued by Sun for allegedly copying the design of Sun. Since the Pentium, Intel has implemented Pipelining capabilities that typically exist diprocessor cuman RISC (RISC like SunSparc). Vesa Local Bus that 32bit is the development of ISA 16bit architecture uses a fixed clock because it has its own clock generator (typically> 33MHz) while the PCI architecture is a new architecture that speeds clocknya follow Processor clock speed (typically half the speed of processor speed) .. so the relative speed PCI VGA card will not be the same in a different processor MHz frequency aliases faster MHz processor, the faster PCI his
* In 1995, the emergence of the Pentium Pro. Innovation united cache memory into the processor demands made socket 8. Pin-pin processor is divided into two groups: one group to the cache memory, and a group again for the processor itself, which is nothing more than pin-pin Pentium modified arrangement. Processor design allows a higher efficiency when dealing with 32-bit instructions, but if there is a 16-bit instructions appearing in 32-bit instruction cycle, then the processor will make emptying the cache so that the execution process is slow. There's only one instruction is added: CMOV (Conditional MOVE).
* In 1996, the Pentium MMX. Actually nothing more than a Pentium with additional units and additional instruction sets, ie MMX. Intel still has not provided a clear definition of the term MMX. Multi Media Extension is a term used AMD. There is a limitation on the design of this chip: for MMX modules are added only just into the design of the Pentium without redesign, Intel was forced to make the MMX and FPU units do the sharing, in a sense when FPU MMX active non-active, and vice versa. So the Pentium MMX mode is not compatible with the Pentium MMX.
What about the AMD K5? AMD K5-PR75 is actually a 'clone' i80486DX with internal speed 133MHz and 33MHz bus clock. Specifications Pentium AMD gained when designing the next versions K5 and Cyrix when designing the 6 × 86 was limited to a pin-pin Pentium specification. They were not given access to the original design. Even IBM can not make Intel unmoved (Cyrix, IBM has a contract until the year tied with 2005)
Regarding the design of the AMD K6, K6 did you know that the design is actually owned by NexGen? As Intel states make the unit MMX, AMD is looking for design and add it to the K6 MMX. Unfortunately specifications are obtained MMX AMD used Intel's likely not, since proven to have many ketidakkompatibilitas K6 MMX instruction with the Pentium MMX.
* In 1997, Intel launched the Pentium II, Pentium Pro with MMX technology which has two innovations: the cache memory does not become one with the core as the Pentium Pro processor, but outside the nucleus but functions with processor speed. Innovation is what causes the loss of deficiency Pentium Pro (problems emptying the cache) The second innovation, the SEC (Single Edge Cartidge), Why? Since we can install the Pentium Pro processor in the slot with the help of special adapters SEC. Addendum: since onprocessor L2 cache, the cache speed = speed of the processor, whereas for the PII its cache in the "outside" (using the processor module), then the speed is half the processor speed. Mentioned also use the PII Slot 1 for several reasons:
First, to widen the data path (foot lot - also became the reason for Socket 8), processing in PPro and PII can be parallel. Slot 1 because it actually had more power in Multithreading / Multiple Processor. (Unfortunately the O / S has not been much support, dual PII benchmark processorpun by ZDBench more done via Win95 rather than via NT)
Second, it allows upgrader Slot 1 without consuming a lot of space on the motherboard because if not ZIF socket 9, could be an area of Form Factor (MB) of its own this space-saving concept since 8088 has also been there. Why out as well SIMM specifications in 286? some of which is efficiency and simplification of the forms.
Third, it allows the use of the cache module that is more efficient and with high speed balanced with speed processors and again without a lot of eating places, unlike AMD / Cyrix are "forced" to double its cache L1 to rival the speed PII (because of its slow L2) so that conclusions AMD K6 and Cyrix 6 × 86 rather quickly in the processor rather quickly in a cache hit! Because the spec Socket7 L2 cache speed will be limited only as fast as the data bus / slower when the data bus is busy, but PII next year is planned to operate at 100MHz (66MHz instead of longer). Point is one of the reasons why the intel chipset change of 430 to 440 which means also need to replace the motherboard.
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